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Click here for more information74ALVC16836ADGG
20-bit registered driver with inverted register enable; 3?state
The 74ALVC16836A is a 20-bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP).
When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop.
When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latch?/?flip?-?flop.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features and benefits
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low-power consumption
- Direct interface with TTL levels
- Current drive ± 24 mA at 3.0 V
- MULTIBYTE flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for minimum noise and ground bounce
- Output drive capability 50 ? transmission lines at 85°C
- Input diodes to accommodate strong drivers
- Complies with JEDEC standard no. 8-1A
- Complies with JEDEC standards:
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
- CDM JESD22-C101E exceeds 1000 V
Applications
PCB Symbol, Footprint and 3D Model
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封裝
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74ALVC16836ADGG | 74ALVC16836ADGG:11 (935267385112) |
Obsolete | no package information | ||||
| 74ALVC16836ADGG,11 (935267385118) |
Obsolete | ||||||
環(huán)境信息
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74ALVC16836ADGG | 74ALVC16836ADGG:11 | 74ALVC16836ADGG |
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| 74ALVC16836ADGG | 74ALVC16836ADGG,11 | 74ALVC16836ADGG |
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Series
文檔 (2)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74ALVC16836A | 20-bit registered driver with inverted register enable; 3-state | Data sheet | 2018-09-12 |
| alv836a | alv836a IBIS model | IBIS model | 2013-04-08 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| alv836a | alv836a IBIS model | IBIS model | 2013-04-08 |
PCB Symbol, Footprint and 3D Model
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.