ALVT logic devices are specified over 2.7V to 3.6V and support live insertion. With output drive as high as 64 mA and typical propagation delay of 1.5 ns, the ALVT family consists of 16-bit parallel interface logic.
Power up reset, power up 3-state output, bus hold and live insertion are some of the advanced features of these devices making them ideal for parallel backplane applications.
ALVT products are available in standard SSOP and TSSOP packages.
Nexperia's ALVT products are fully specified from -40°C to 85°C.
主要特性和優(yōu)勢(shì)
Features and benefits
- 1.5 ns typical propagation delay
- Output drive capability IOH / IOL = -32 / +64 mA
- 5 V-tolerant I/O
- Power-up / power-down 3-state
- Live insertion
- Bus hold on data inputs
- Optional: Buffers and drivers with 30 Ω integrated termination resistor
關(guān)鍵應(yīng)用
Applications
- Backplane drivers
- Workstations
- Telecom and networking equipment
- Advanced bus interfaces
- Computer peripherals
Parametric search
ALVT
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Products
Analog & Logic ICs
| 型號(hào) | 描述 | 狀態(tài) | 快速訪問 |
|---|---|---|---|
| 74ALVT16543DGG | 2.5 V/3.3 V ALVT 16-bit registered transceiver (3-state) | EndOfLife | |
| 74ALVT16601DL | 18-bit universal bus transceiver; 3-state | EndOfLife | |
| 74ALVT162823DL | 18-bit bus-interface D-type flip-flop with reset and enable with 30 Ohm termination resistors; 3-state | EndOfLife | |
| 74ALVT162245DL | 16-bit transceiver with 30 Ohm termination resistors; 3-state | EndOfLife | |
| 74ALVT16827DL | 20-bit buffer/line driver; non-inverting; 3-state | EndOfLife | |
| 74ALVT162827DL | 20-bit buffer/line driver; non-inverting; with 30 Ohm?termination resistors;?3-state | EndOfLife | |
| 74ALVT16823DL | 18-bit bus-interface D-type flip-flop with reset and enable; 3?-?state | EndOfLife | |
| 74ALVT16244DL | 16-bit buffer/line driver; 3-state | EndOfLife | |
| 74ALVT162821DL | 20-bit bus interface D-type flip-flop; positive?-?edge trigger with 30 Ohm termination resistors; 3?-?state | EndOfLife | |
| 74ALVT16821DL | 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state | EndOfLife | |
| 74ALVT16373DL | 16-bit transparent D-type latch; 3-state | EndOfLife | |
| 74ALVT16501DGG | 18-bit universal bus transceiver; 3-state | EndOfLife | |
| 74ALVT16601DGG | 18-bit universal bus transceiver; 3-state | EndOfLife | |
| 74ALVT16827DGG | 20-bit buffer/line driver; non-inverting; 3-state | Production | |
| 74ALVT162821DGG | 20-bit bus interface D-type flip-flop; positive?-?edge trigger with 30 Ohm termination resistors; 3?-?state | Production | |
| 74ALVT16823DGG | 18-bit bus-interface D-type flip-flop with reset and enable; 3?-?state | Production | |
| 74ALVT16821DGG | 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state | Production | |
| 74ALVT162827DGG | 20-bit buffer/line driver; non-inverting; with 30 Ohm?termination resistors;?3-state | Production | |
| 74ALVT16373DGG | 16-bit transparent D-type latch; 3-state | Production | |
| 74ALVT162823DGG | 18-bit bus-interface D-type flip-flop with reset and enable with 30 Ohm termination resistors; 3-state | Production | |
| 74ALVT16244DGG | 16-bit buffer/line driver; 3-state | Production | |
| 74ALVT162245DGG | 16-bit transceiver with 30 Ohm termination resistors; 3-state | Production |
Documentation
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| TSSOP48_SOT362-1_mk.png | plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body | Marcom graphics | 2017-01-28 |
| vp_1313743843506_zh_CN.zip | 高級(jí)低壓BiCMOS技術(shù)(ALVT) | Value proposition | 2017-03-04 |
| vp_1313743843506.zip | Advanced Low-Voltage BiCMOS Technology (ALVT) | Value proposition | 2017-04-06 |
| Nexperia_document_whitepaper_FloatingInputs_Logic_BusHold_201909.pdf | Addressing floating inputs in digital systems (Bus Hold) | White paper | 2019-10-01 |
| Nexperia_Selection_guide_2023.pdf | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
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