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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調節(jié)ESD保護

MOSFET

氮化鎵場效應晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應用認證產(chǎn)品(AEC-Q100/Q101)

74LVCH8T245BQ

8-bit dual supply translating transceiver; 3-state

The 74LVC8T245; 74LVCH8T245 are 8-bit dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two data input-output ports (pins An and Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.

Active bus hold circuitry in the 74LVCH8T245 holds unused or floating data inputs at a valid logic level.

Features and benefits

  • Wide supply voltage range:

    • VCC(A): 1.2 V to 5.5 V

    • VCC(B): 1.2 V to 5.5 V

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • Maximum data rates:

    • 420 Mbps (3.3 V to 5.0 V translation)

    • 210 Mbps (translate to 3.3 V)

    • 140 Mbps (translate to 2.5 V)

    • 75 Mbps (translate to 1.8 V)

    • 60 Mbps (translate to 1.5 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • ±24 mA output drive (VCC = 3.0 V)

  • Inputs accept voltages up to 5.5 V

  • Low power consumption: 30 μA maximum ICC

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

參數(shù)類型

型號 VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name Category
74LVCH8T245BQ 1.2?-?5.5 1.2?-?5.5 CMOS/LVTTL ± 24 3.5 8 low -40~125 66 5.8 40 DHVQFN24 Bi-directional | Direction controlled

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74LVCH8T245BQ 74LVCH8T245BQ,118
(935290148118)
Active VCH8T245 SOT815-1
DHVQFN24
(SOT815-1)
SOT815-1 SOT815-1_118

環(huán)境信息

型號 可訂購的器件編號 化學成分 RoHS RHF指示符
74LVCH8T245BQ 74LVCH8T245BQ,118 74LVCH8T245BQ rohs rhf rhf
品質及可靠性免責聲明

文檔 (10)

文件名稱 標題 類型 日期
74LVC_LVCH8T245 8-bit dual supply translating transceiver; 3-state Data sheet 2024-11-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
SOT815-1 3D model for products with SOT815-1 package Design support 2019-10-03
lvch8t245 74LVCH8T245 IBIS model IBIS model 2020-11-24
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN24_SOT815-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 3.5 mm x 5.5 mm x 0.85 mm body Marcom graphics 2017-01-28
SOT815-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 5.5 mm x 3.5 mm x 1 mm body Package information 2021-08-17
SOT815-1_118 DHVQFN24; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74LVCH8T245BQ_Nexperia_Product_Reliability 74LVCH8T245BQ Nexperia Product Reliability Quality document 2024-06-16

支持

如果您需要設計/技術支持,請告知我們并填寫 應答表 我們會盡快回復您。

模型

文件名稱 標題 類型 日期
lvch8t245 74LVCH8T245 IBIS model IBIS model 2020-11-24
SOT815-1 3D model for products with SOT815-1 package Design support 2019-10-03

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74LVCH8T245BQ 74LVCH8T245BQ,118 935290148118 Active SOT815-1_118 3,000 訂單產(chǎn)品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74LVCH8T245BQ 74LVCH8T245BQ,118 935290148118 SOT815-1 訂單產(chǎn)品
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