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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調(diào)節(jié)ESD保護

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LV4094DB

8-stage shift-and-store bus register

The 74LV4094 is an 8?-?bit serial?-?in/serial or parallel?-?out shift register with a storage register and 3?-?state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW?-?to?-?HIGH transitions of the CP input. Data is available at QS1 on the LOW?-?to?-?HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH?-?to?-?LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high?-?impedance OFF?-?state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Optimized for low voltage applications over a wide supply voltage range from 1.0 V to 3.6 V

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Complies with JEDEC standards

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

  • Serial-to-parallel data conversion

  • Remote control holding register

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LV4094DB 74LV4094DB,112
(935166090112)
Obsolete no package information
74LV4094DB,118
(935166090118)
Obsolete

環(huán)境信息

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74LV4094DB 74LV4094DB,112 74LV4094DB rohs rhf rhf
74LV4094DB 74LV4094DB,118 74LV4094DB rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (1)

文件名稱 標(biāo)題 類型 日期
74LV4094 8-stage shift-and-store bus register Data sheet 2024-05-28

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Longevity

The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.


模型

No documents available

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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